Nowadays, the prevalence of electronic and computing systems in our lives is so ubiquitous that it would not be far-fetched to state that we live in a cyber-physical world dominated by computer systems. Examples include pacemakers implanted within the human body to regulate and monitor heartbeats, cars and airplanes transporting us, smart grids and traffic management.
All these systems demand for more and more computational performance to process large amounts of data from multiple data sources, and some of them with guaranteed processing response times. In other words, systems required to deliver their results within pre-defined (and sometimes extremely short) time bounds. This timing aspect is vital for systems like planes, cars, business monitoring, e-trading, etc. Examples can be found for instance in intelligent transportation systems for fuel consumption reduction in cities or railway, or autonomous driving of vehicles. All these systems require processing and actuation based on big amounts of data coming from real-time sensor information.
As a result, the computer electronic devices to which these systems depends on are constantly required to become more and more powerful and reliable, while remaining affordable. In order to cope with such performance requirements, chip designers have recently started producing chips containing multiple processing units, the so called multi-core processors, effectively integrating multiple computers within a single chip, and more recently the many-core processors, with dozens or hundreds of cores, interconnected with complex networks on chip. This radical shift in the chip design paved the way for parallel computing: rather than processing the data sequentially, the cooperation of multiple processing elements within the same chip allowed systems to be executed concurrently, in parallel.
Unfortunately, the parallelization of the computing activities brought upfront many challenges, because it affects the timing behaviour of systems as well as the entire way people think and the design computers: from the design of the hardware architecture, through the operating system up to the conceptualization of the end-user application. Therefore, although many-core processors are promising candidates to improve the responsiveness of these systems, the interactions that the different computing elements may have within the chip, can seriously affect the performance opportunities brought by parallel execution. Moreover, providing timing guarantees becomes harder, because the timing behaviour of the system running within a many-core processor depends on interactions that are most of the time not know by the system designer. This makes system analysts to be struggled trying to provide timing guarantees for such platforms. Finally, most of the optimization mechanisms buried deep inside the chip are geared only to increase performance and execution speed rather than providing predictable time behaviour.
The aim of P-SOCRATES is to allow current and future applications with high-performance and real-time requirements to fully exploit the huge performance opportunities brought by the most advanced many-core processors, whilst ensuring a predictable performance and maintaining (or even reducing) development costs of applications. P-SOCRATES will develop an entirely new generic design framework, from the conceptual design of the system functionality to its physical implementation, to facilitate the deployment of standardized parallel architectures in all kinds of systems.
Industrial companies will benefit from the project outcomes, allowing European technology suppliers to properly exploit the capabilities of next-generation hardware platforms in a predictable way. Impacts are foreseen in the development of enabling technologies for both the high-performance and embedded computing domains. From an applicative point of view, P-SOCRATES will represent a reference point for the implementation of real-time complex event-processing systems, and, more in general, of workload-intensive applications with time-criticality requirements, enabling a more efficient smart society. The computing technology developed in the project will allow a deeper understanding of many-core off-the-shelf systems, enabling new kinds of applications to be developed on top of these platforms.